1. Field of the Invention
This invention relates to an improved data separation circuit having a phase-locked loop (or "phase lock loop") for use in digital storage systems of the Winchester disk drive type.
2. Background of the Invention
Modern computer systems may be generally characterized as being controlled by a central, keyboard accessible, processing unit (CPU), which is connected to external modems for communication and disk drives for the storage of data (in excess of the memory capability commonly found in today's microprocessor based systems). This external digital data may be stored on flexible or "floppy" disks or on hard or Winchester-type disks by the magnetization of successive small sectors on the magnetic surface of the disk, by means of a magnetic head as the disk rotates. The density of digital storage on hard disk memory systems is on the order of ten to twenty times the density achieved with floppy disk memory systems. Winchester disk drive systems generally have a plurality of hard disks made from aluminum and coated with some type of recording media such as a magnetic oxide or magnetic metallic material. Each side of the disk is coated with recording media and each side can store data. Each surface of the disk is associated with its own read and write head.
The read and write heads are mechanically linked together to form a head positioner assembly and the heads move as a single unit across the surface of the disk. Disks are preferably driven by a DC brushless motor at a relatively high speed in the order of 3600 revolutions per minute (RPM. Hard magnetic storage disks were originally relatively large in diameter, but have in the last few years, been reduced in size so that 51/4" diameter disk systems are now widely available. As the size of the hard disk drives have become continually smaller, the storage capacity of the disk system has become progressively larger. Recent series disk drives provide in excess of 380 M bytes of data in a standard 5.25 inch disk system, where "M bytes" stands for millions of bytes of digital storages, and each byte contains eight binary digits or bits of data.
Data stored on the hard disks of a Winchester disk drive system is useful only if the data may be retrieved from the disk by the central processing unit in an orderly and logical fashion. The actual signals recorded on a disk represent a combination of timing information (clock) and data. The serial data is assembled into eight bit bytes for transfer to a system memory.
Interfacing between the microprocessor system and the disk drive is generally accomplished by large scale integrated (LSI) disk controllers which perform the functions of disk drive selection, track selection, sector selection, head loading and error checking. In addition to or as part of the disk controller function, data separation and decoding circuitry is necessary to allow the interface system to synchronize itself to the actual data rate of the disk drive so the data may be transferred in an orderly manner to the central processing unit. The data rate detected by the data separation circuitry varies from drive to drive due to mechanical factors such as motor speed tolerances. In order for a Winchester disk drive system to operate reliably and for the LSI disk controller to transfer data to the central computer in a reliable manner, the data separation circuitry is preferably based on phase-locked loop (PLL) technology. The function of the data separation logic is to synchronize the interface circuitry with the data stream coming from the disk. The controller uses a window established by the separator to reconstruct the data previously recorded on the hard disk drive system. Within the data separation circuit, an analog phase-locked loop may provide the reliability required for accurate data separation. The phased locked loop constantly analyzes the frequency of input real time signal from the hard disk drive and locks a variable oscillator, usually a voltage-controlled oscillator, to that frequency. Using analog PLL techniques, a data separator circuit can be designed so as to achieve better than plus or minus one nanosecond resolution. The analog PLL determines the clock and data bit positions by sampling each bit in the serial data stream. The phase relationship between the data bit stream and a voltage controlled oscillator is constantly fed back to adjust the frequency of the oscillator and the resultant position of the data window, enabling the PLL to track input data frequency changes, and thereby reliably read previously recorded data from a hard disk drive system.
Generally, the variable frequency voltage control oscillator of the phase-locked loop system as used in conjunction with a hard disk drive, has a variable capacitor or varactor which acts as a primary component of a control circuit which controls the frequency output of the oscillator. This variable capacitor or varactor in turn is characteristically controlled by a charged pump circuit and an associated capacitor network. The charge pump circuit either charges up or charges down the capacitor network in order to move or change the voltage applied to the varactor and the resultant frequency output of the variable oscillator and thereby move the data window to track the real time signal that is received from the disk drive storage.
FIG. 5 shows the prior art configuration of the internal circuit of the charge pump of a phase-locked loop. The output 50 of the charge pump of FIG. 5 is tied to the capacitor 57. When a pulse 52 is imparted on the base of NPN transistor 54, the capacitor of the control circuit is allowed to discharge by way of pathway 56 through the controlled collector-emitter circuit of transistor 54 to ground 55. On the other hand, if the capacitor tied to output 50 needs to be charged up, a pulse 58 would be imparted onto PNP transistor 51, turning PNP transistor 51 "on" and allowing current to flow through PNP transistor 51 and out through conductive pathway 59 to the control circuit which is tied to the capacitor 57 of the output 50. The circuitry shown in FIG. 5 is a discrete component circuitry and part of an overall hybrid board system for charging the capacitor network of the control circuit "up" or "down"; thereby, changing the output frequency of the voltage-controlled oscillator. It can be seen that PNP transistor 51 and NPN transistor 54 are coupled in a push-pull configuration to achieve up and down charging of the capacitor 57 that is tied to the output 0. This circuit is adequate; however space limitations dictate the need for the entire data separation circuitry to be embodied in a single monolithic integrated circuit chip.
A single integrated circuit chip embodying such phased locked loop data separation circuitry could be fabricated but would not exactly emulate the structure and function of the discrete component circuitry of the hybrid chip, especially that of the charge pump shown in FIG. 5. Transistor-transistor logic (TTL) is generally chosen for integrated circuit fabrication because the TTL integrated circuits are known for high switching speed and good noise immunity Good noise immunity means reliable operation of a digital system even where heavy electrical equipment (such as motors or high current relays) are nearby. Although this form of integrated circuitry provides the fast speed that is necessary to maintain a data window for a hard disk drive system, there is a limitation on the different types of components that are available to be etched or formed onto the photoresist surface monolithic integrated circuit. For example, the push-pull configuration of PNP transistor 51 and NPN transistor 54 (of FIG. 5) is difficult to reconstruct in the fast vertical transistor geometry normally associated with TTL integrated circuits. Laterally-directed PNP transistors may be established across the top surface of an integrated circuit, but these lateral PNP transistors are substantially slower in speed than the NPN transistors. NPN transistors typically are good current sinks and useful for discharging the capacitor of the control circuit of a phased-locked loop; however, only PNP transistors are traditionally good current sources for use in charging up a capacitor, as shown in FIG. 5, and discussed above.
Thus, the problem presented when one looks to convert from discrete component circuitry to integrated circuitry (in a hard disk drive system) has not easily been solved heretofore. Designing a data separation circuit which is fully integrated is difficult to achieve.
Accordingly, an object of the invention is to provide a high speed integrated separation circuit, including a phase-locked loop.